Solutions Architect HPC

Austin, TX, USA | AMD

  • Industry:
    Computer Hardware / Consumer Electronics
  • Position Type:
    Full-Time
  • Functions:
    Consulting - IT
  • Experience:
    5-7 years
    7-10 years
    10-12 years
Job Description:
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This position requires an individual with excellent verbal and written communication skills and a good balance of hardware, system architecture and software expertise. The successful candidate must demonstrate the ability to independently manage multiple priorities to deliver results on time, and to build excellent working relationships both internally and externally.


Must-haves:



  • Expertise in compiling large codes from source, with appropriately linked math libraries and flag optimisation: VASP, CP2K, NAMD for example

  • Experience with large CFD and Structural ISV codes

  • Excellent knowledge in the landscape of different math Libraries for HPC

  • Impact of system level hardware and configuration on performance, such as Infiniband and shared parallel filesystems

  • Able to write good Fortran and C, and understand the differences between their respective standards.

  • Demonstrated ability to incorporate and scrutinize MPI and OpenMP

  • Solid understanding of configuring baseline synthetic codes: HPL, STREAM, DGEMM, HPCG, HPCC

  • Application expertise across a number of CFD, Molecular Dynamics, Quantum Chromodynamics, Structural Mechanics, Climate Change, and weather

  • Hands-on experience with performance profiling and monitoring tools and software performance optimization

  • Bachelor’s degree in a technical discipline (computer science, electrical engineering preferred, physics, applied mathematics)

  • At least 5 years experience working with High Performance Computing applications

  • Fluent in English


Nice-to-haves:



  • 10 years or more experience

  • Experience inspecting assembly

  • Experience with large ISV codes including: LS-DYNA, Star CCM+, Fluent, ABAQUS, NASTRAN, Paraview, CFX, Gaussian

  • Knowledge in hybrid MPI+OMP

  • Understanding of memory and cache hierarchy and methods to query performance/latency at each level

  • Understanding HPC dataflow down to the register-level

  • Experience making performance projections